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Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
FEATURES
* (1) LVCMOS/LVTTL output * Crystal oscillator interface designed for a 24.576MHz, 18pF parallel resonant crystal * Output frequency: 98.304MHz (typical) * VCO range: 490MHz to 640MHz * RMS phase jitter @ 98.304MHz, using a 24.576MHz crystal (12KHz - 20MHz): 0.75ps (typical) * RMS phase noise at 98.304MHz (typical) Offset Noise Power 100Hz .............. -103.3 dBc/Hz 1KHz .............. -126.2 dBc/Hz 10KHz .............. -134.2 dBc/Hz 100KHz .............. -132.9 dBc/Hz * 3.3V core/1.8V output operating supply * Lead-Free fully RoHS compliant * -40C to 85C ambient operating temperature
GENERAL DESCRIPTION
The ICS840031I is an IEEE 1394b Clock Generator and a member of the HiPerClocksTM HiPerClockSTM family of high performance devices from ICS. The ICS840031I uses a 24.576MHz crystal to synthesize 98.304MHz. The ICS840031I has excellent phase jitter performance, from 12KHz - 20MHz integration range. The ICS840031I is packaged in a small 8-pin SOIC, making it ideal for use in systems with limited board space.
ICS
FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 24.576 Output Frequency (MHz) 98.304
BLOCK DIAGRAM
PLL_SEL (Pullup)
PIN ASSIGNMENT
0
VDD XTAL_OUT XTAL_IN VDDA 1 2 3 4 8 7 6 5 VDDO Q0 GND PLL_SEL
XTAL_IN
Q0
OSC
XTAL_OUT
Phase Detector
VCO
589.824MHz w/ 24.576MHz Ref.
/6
1
ICS840031I
8-Lead SOIC 3.90mm x 4.90mm x 1.37mm package body M Package Top View
M = /24 (fixed)
840031AMI
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Type Power Input Power Input Power Pullup Description Core supply pin. Cr ystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output. Analog supply pin. PLL select pin. LVCMOS/LVTTL interface levels. Power supply ground. Single-ended clock output. LVCMOS/LVTTL interface levels. Output supply pin.
TABLE 1. PIN DESCRIPTIONS
Number 1 2, 3 4 5 6 7 8 Name VDD XTAL_OUT, XTAL_IN VDDA PLL_SEL GND Q0 VDDO
Output Power
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol CIN CPD RPULLUP ROUT Parameter Input Capacitance Power Dissipation Capacitance Input Pullup Resistor Output Impedance VDD = VDDA = 3.465V, VDDO = 1.89V Test Conditions Minimum Typical 4 18 51 10 Maximum Units pF pF k
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
4.6V -0.5V to VDD + 0.5 V -0.5V to VDDO + 0.5V 112.7C/W (0 lfpm) -65C to 150C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, VDDO = 1.8V5%, TA = -40C TO 85C
Symbol VDD VDDA VDDO IDD IDDA IDDO Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Output Supply Current Test Conditions Minimum 3.135 3.135 1.71 Typical 3.3 3.3 1.8 Maximum 3.465 3.465 1.89 55 12 5 Units V V V mA mA mA
TABLE 3B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = 3.3V5%, VDDO = 1.8V5%, TA = -40C TO 85C
Symbol VIH VIL IIH IIL VOH Parameter Input High Voltage Input Low Voltage Input High Current Input Low Current PLL_SEL PLL_SEL VDD = VIN = 3.465V VDD = 3.465V, VIN = 0V -150 1.5 0.4 Test Conditions Minimum 2 -0.3 Typical Maximum VDD + 0.3 0.8 5 Units V V A A V V
Output High Voltage; NOTE 1
VOL Output Low Voltage; NOTE 1 NOTE 1: Outputs terminated with 50 to VDD/2. See Parameter Measurement Information Section, "3.3V/1.8V Output Load Test Circuit".
TABLE 4. CRYSTAL CHARACTERISTICS
Parameter Mode of Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance F_SEL = 1 20.417 Test Conditions Minimum Typical Fundamental 24.576 26.667 50 7 MHz pF Maximum Units
TABLE 5. AC CHARACTERISTICS, VDD = VDDA = 3.3V5%, VDDO = 1.8V5%, TA = -40C TO 85C
Symbol fOUT Parameter Output Frequency RMS Phase Jitter (Random); NOTE 1 Output Rise/Fall Time Test Conditions fOUT = 98.304MHz, (12KHz to 20MHz) 20% to 80% Minimum 81.67 Typical 98.304 0.75 0.2 46 1 54 Maximum 106.67 Units MHz ps ns %
tjit(O)
tR / tF
odc Output Duty Cycle NOTE 1: Please refer to the Phase Noise Plot.
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
TYPICAL PHASE NOISE AT 98.304MHZ
-10 -20 -30 -40 -50
Filter 98.304MHz
RMS Phase Jitter (Random) 12KHz to 20MHz = 0.75ps (typical)
0
NOISE POWER dBc Hz
-60 -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 -170 -180 -190 10 100 1k 10k 100k 1M 10M 100M
Raw Phase Noise Data
Phase Noise Result by adding a Filter to raw data OFFSET FREQUENCY (HZ)
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840031AMI
REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
2.40.9V 0.9V5%
Phase Noise Plot
Noise Power
VDD, VDDA
SCOPE
VDDO GND
Qx
Phase Noise Mask
LVCMOS
f1
Offset Frequency
f2
-0.9V5%
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V/1.8V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
V
DD
80% 20% tR
80% 20% tF
Q0
Pulse Width t
2
PERIOD
Clock Outputs
odc =
t PW t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are vulnerable to random noise. The ICS840031I provides separate power supplies to isolate any high switching noise from the outputs to the internal PLL. VDD, VDDA, and VDDO should be individually connected to the power supply plane through vias, and bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10 resistor along with a 10F and a .01F bypass capacitor should be connected to each VDDA pin.
3.3V VDD .01F V DDA .01F 10F 10
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
The ICS840031I has been characterized with 18pF parallel resonant crystals. The capacitor values, C1 and C2, shown in Figure 2 below were determined using a 24.576MHz, 18pF parallel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for different board layouts.
XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 22p
Figure 2. CRYSTAL INPUt INTERFACE
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
example, an 18pF parallel resonant crystal is used. The C1=22pF and C2=33pF are approximate values for frequency accuracy. The C1 and C2 may be slightly adjusted for optimizing frequency accuracy.
APPLICATION SCHEMATIC EXAMPLE
Figure 3 shows a schematic example of the ICS840031I. In this example, a series termination, one of LVCMOS termination approaches, is shown. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this
VDD
VDD
C6 0.1u
VDDO
R1 1K
R3 40
Zo = 50 Ohm
U1
1 2 3 4
VDD XTAL_OUT XTAL_IN VDDA VDDO Q0 GND PLL_SEL
C2 33pF
8 7 6 5
X1 CL=18pF
C1 22pF
LVCMOS
ICS840031I
C5 0.1u
VDD
R2 10
C3 10uF
VDDA
C4 0.1u
VDD=3.3V
VDDO=1.8V
FIGURE 3. ICS840031I APPLICATION SCHEMATIC EXAMPLE
RELIABILITY INFORMATION
TABLE 6.
JAVS. AIR FLOW TABLE FOR 8 LEAD SOIC
JA by Velocity (Linear Feet per Minute)
0 200
128.5C/W 103.3C/W
500
115.5C/W 97.1C/W
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards
153.3C/W 112.7C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS840031I is: 1787
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
8 LEAD SOIC
PACKAGE OUTLINE - M SUFFIX
FOR
TABLE 7. PACKAGE DIMENSIONS
SYMBOL N A A1 B C D E e H h L 5.80 0.25 0.40 0 1.35 0.10 0.33 0.19 4.80 3.80 1.27 BASIC 6.20 0.50 1.27 8 Millimeters MINIMUN 8 1.75 0.25 0.51 0.25 5.00 4.00 MAXIMUM
Reference Document: JEDEC Publication 95, MS-012
840031AMI
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REV. A FEBRUARY 24, 2005
Integrated Circuit Systems, Inc.
ICS840031I
FEMTOCLOCKSTM CRYSTAL-TOLVCMOS/LVTTL CLOCK GENERATOR
Marking 840031AI 840031AI 40031AIL 40031AIL Package 8 lead SOIC 8 lead SOIC 8 lead "Lead-Free" SOIC 8 lead "Lead-Free" SOIC Count tube 2500 tape & reel tube 2500 tape & reel Temperature -40C to 85C -40C to 85C -40C to 85C -40C to 85C
TABLE 8. ORDERING INFORMATION
Part/Order Number ICS840031AMI ICS840031AMIT ICS840031AMILF ICS840031AMILFT
The aforementioned trademarks, HiPerClockSTM and FemtoClocksTM are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial and industrial applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840031AMI
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REV. A FEBRUARY 24, 2005

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